llvm-project

d26106db - [AArch64] Set the cache line size to 64 for the V2 and V3. (#148213)

[AArch64] Set the cache line size to 64 for the V2 and V3. (#148213) This sets the cache line size to 64 for the Neoverse V2 and V3. I've tested this with loop-interchange: it doesn't result in extra compile-times, but it does enable a lot more interchange.