llvm-project

d57c4e4c - [X86] Add basic ISD::VECREDUCE_AND/OR/XOR handling (#195063)

[X86] Add basic ISD::VECREDUCE_AND/OR/XOR handling (#195063) Custom lower ISD::VECREDUCE_AND/OR/XOR using vector logic ops Handling of any_of/all_of/parity patterns will happen later once we start dismantling combinePredicateReduction()