llvm-project

d58f5722 - [RISCV] Use named sub-operands to simplify encoding/decoding for CoreV Reg-Reg instructions. (#133181)

[RISCV] Use named sub-operands to simplify encoding/decoding for CoreV Reg-Reg instructions. (#133181) We can name the sub-operands using a DAG in the 'ins'. This allows those names to be matched to the encoding fields. This removes the need for a custom encoder/decoder that treats the 2 sub-operands as a single 10-bit value. While doing this, I noticed the base and offset names in the MIOperandInfo were swapped relative to how the operands are parsed and printed. Assuming that I've correctly understood the parsing/print format as "offset(base)".