llvm-project

d7a28f7a - [RISCV] Add asserts for insert/extract_subvector invariants. NFC

[RISCV] Add asserts for insert/extract_subvector invariants. NFC We can currently select insert_subvector and extract_subvector nodes in RISCVISelDAGToDAG (this is after custom legalizing in RISCVISelLowering) with fixed subvector types. However decomposeSubvectorInsertExtractToSubRegs is based off of scalable subvectors where the indices are scaled by vscale, so any index other than 0 will be wrong. For insert_subvector the vector being inserted into needs to be undef as well, because it assumes we can replace a whole subregister which isn't always the case for fixed subvectors (e.g. insert <2 x i32> into <4 x i32> at index 0 with vlen=128). We currently maintain these invariants in RISCVISelLowering, so this adds asserts in RISCVISelDAGToDAG so we don't break them.