llvm-project

dbcbdc4d - [RISCV] Add IsSignExtendingOpW to P-ext CLS, CLSW, and ABSW instructions. (#151037)

[RISCV] Add IsSignExtendingOpW to P-ext CLS, CLSW, and ABSW instructions. (#151037) This matches other W instructions. CLS is included since it can only return 0-64 which has bits [63:31] as zero. This is similar to CLZ. This doesn't do anything yet since we don't have CodeGen support for P.