Re-apply "[AMDGPU][Scheduler] Use MIR-level rematerializer in rematerialization stage (#189491)" (#192443)
This fixes compilation errors in EXPENSIVE_CHECKS introduced by
[be62f27](https://github.com/llvm/llvm-project/commit/be62f270fd01e8c526f1e37df74ff1061e360dab).
This is solved by moving the EXPENSIVE_CHECKS block at its original
caller's site so that the data it reads is available.
Original PR description below.
---
This makes the scheduler's rematerialization stage use the
target-independent rematerializer. Previosuly duplicate logic is
deleted, and restrictions are put in place in the stage so that the same
cosntraints as before apply on rematerializable registers (as the
rematerializer is able to expose many more rematerialization
opportunities than what the stage can track at the moment). Consequently
it is not expected that this change improves performance overall, but it
is a first step toward being able to use the rematerializer's more
advanced capabilities during scheduling.
This is *not* a NFC for 2 reasons.
- Score equalities between two rematerialization candidates with
otherwise equivalent score are decided by their corresponding register's
index handle in the rematerializer (previously the pointer to their
state object's value). This is determined by the rematerializer's
register collection order, which is different from the stage's old
register collection order. This is the cause of all test changes but
one, and should not be detrimental to performance in real cases.
- To support rollback, the stage now uses the rematerializer's rollback
listener instead of its previous ad-hoc method (setting the opcode of
rematerialized MIs to a DBG_VALUE, and their registers to the sentinel).
This is the source of test changes in
`machine-scheduler-sink-trivial-remats-debug.mir`. The new rollback
mechanism completely removes the behavior tested by
`misched-remat-revert.ll` so the test is deleted.