llvm-project

dfb8d68f - [RegAlloc] consider urgent evict in evictInterference (#192631)

[RegAlloc] consider urgent evict in evictInterference (#192631) This assertion causes a crash in programs with high register pressure when inline assembly is used. ``` assert((ExtraInfo->getCascade(Intf->reg()) < Cascade || VirtReg.isSpillable() < Intf->isSpillable()) && "Cannot decrease cascade number, illegal eviction"); ``` It should account for the case where an urgent eviction may result in cascade being less than `ExtraInfo->getCascade(Intf->reg())` --------- Co-authored-by: Matt Arsenault <arsenm2@gmail.com>