llvm-project
e0ccf9cb - [AArch64][SelectionDAG] Generate subs+csel for usub.sat (#193203)

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68 days ago
[AArch64][SelectionDAG] Generate subs+csel for usub.sat (#193203) Fixes https://github.com/llvm/llvm-project/issues/191488 As this is a regression of https://github.com/llvm/llvm-project/pull/170076, adds a check to avoid generic lowering of usub.sat to X - zext(X != 0) in case of aarch64 by making the constraint of this transformation stricter via an extra isOperationLegalOrCustom guard on USUBO_CARRY. All other backends will still receive generic lowering as implemented in the original patch.
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