llvm-project

e29228ef - [AMDGPU][MC] Allow VOP3C dpp src1 to be imm or SGPR (#87418)

[AMDGPU][MC] Allow VOP3C dpp src1 to be imm or SGPR (#87418) Allows src1 of VOP3 encoded VOPC to be an SGPR or inline immediate on GFX1150Plus The w32 and w64 _e64_dpp assembler only real instructions were unused, and erroneously constructed in a way that bugged parsing of the new instructions. They are removed. This patch is a follow up to PR https://github.com/llvm/llvm-project/pull/87382