[AArch64] Lower zero cycle FPR zeroing (#156261)
Lower FPR64, FPR32, FPR16 from `fmov` zeroing into NEON zeroing if the
target supports zero cycle zeroing of NEON registers but not for the
narrower classes.
It handles 2 cases: one in `AsmPrinter` where a FP zeroing from
immediate has been captured by pattern matching on instruction
selection, and second post RA in `AArch64InstrInfo::copyPhysReg` for
uncaptured/later-generated WZR/XZR fmovs.
Adds a subtarget feature called FeatureZCZeroingFPR128 that enables to
query wether the target supports zero cycle zeroing for FPR128 NEON
registers, and updates the appropriate processors.
