[NVPTX] Add lowering for v2i32/v2f16/v2f32 scalar_to_vector operations (#175712)
#153478 revealed additional cases where these scalar_to_vector
operations can appear at the lowering stage. Generally the DAGCombiner
transforms these to something else. Without it running however these can
directly manifest (hence the unit test disabling DAGCombine for
simplicity) but we can map them directly to real instructions so add the
proper lowering.