llvm-project

ff57d874 - TableGen: Skip disjoint register classes before intersecting them (#234803)

TableGen: Skip disjoint register classes before intersecting them (#234803) inferCommonSubClass intersects the member lists of a register class with every other class, and most pairs are disjoint. Check that with the member bit vectors first, which avoids loading the members and allocating the intersection. AMDGPU tablegen runs that build the register bank: Gigainstructions Gigacycles CPU seconds Before 576 346 111 After 573 (-0.6%) 343 (-0.7%) 110 (-0.6%) Co-authored-by: Claude Opus 5.5 <noreply@anthropic.com>