Guard GridSample CUDA coordinate conversion (#29581)
### Description
Guards the CUDA GridSample coordinate conversion paths for non-finite
and extreme grid values, matching the existing CPU behavior for float
grids. The CUDA path now sanitizes coordinates before integer
conversion, uses wider intermediate indices where needed, and clamps
reflected indices before sampling.
Per review feedback, `GsReflect` performs the `isfinite` check before
computing the reflection range (`x_max - x_min`), so a non-finite
coordinate returns early without the extra subtraction. The same reorder
is applied to the CPU `GsReflect`
(`core/providers/cpu/tensor/grid_sample.cc`) to keep the CPU and CUDA
implementations in lockstep; behavior is unchanged.
### Tests
- `.\.venv\Scripts\python.exe tools\ci_build\build.py --config
RelWithDebInfo --build --parallel --target onnxruntime_provider_test
--build_dir build\Windows`
-
`.\build\Windows\RelWithDebInfo\RelWithDebInfo\onnxruntime_provider_test.exe
--gtest_filter=*Grid*`
- 180 tests passed
- `.\.venv\Scripts\clang-format.exe` on touched C++ files
Note: the local build is CPU-only (`onnxruntime_USE_CUDA=OFF`), so CUDA
compilation/runtime coverage will come from CUDA CI.
### Test coverage
The hardening is applied at shared choke-points: coordinate sanitization
runs before interpolation-mode dispatch, and the `int64_t` index
widening and reflected-index clamps are single shared branches. So one
representative case per {mode, padding, dimensionality} exercises the
hardened path rather than the full cross-product. Regression tests use
constant-valued images, so the expected output is well-defined
regardless of which (now sanitized/clamped) index each adversarial
coordinate resolves to; this also sidesteps a pre-existing CPU-vs-CUDA
reflected-index difference (double-reflect + round-half-to-even). The
new `GridSampleCudaHardeningTest` cases run on CPU and CUDA (and
CUDA-NHWC when `ENABLE_CUDA_NHWC_OPS` is enabled); the CUDA kernel is
registered for `float` only, so `double` is exercised through the shared
templated CPU path.
---------
Co-authored-by: Gopalakrishnan Nallasamy <gopalakrishnan.nallasamy@microsoft.com>
