onnxruntime

fb765166 - [MLAS] Restore the run time vector extension check on riscv64 (#32406)

[MLAS] Restore the run time vector extension check on riscv64 (#32406) ## Description ### Motivation PR #28261 installed the MLAS RVV kernels only when the runtime reported the RISC-V V extension, and provided `ORT_MLAS_RISCV_FORCE_SCALAR` as an escape hatch. PR #28411 replaced that gate with an unconditional `__riscv_vlenb()` call and removed the override. This causes two problems: - `platform.cpp` is compiled without requiring `-march=...v`, but `__riscv_vlenb()` requires the vector extension at compile time. Toolchains whose default architecture does not include V therefore reject the build. - An RVV-enabled build can install and execute vector kernels on a riscv64 system that does not provide the V extension. ### Changes - Restore the Linux HWCAP runtime check before installing MLAS RVV kernels. - Restore the `ORT_MLAS_RISCV_FORCE_SCALAR` override. - Remove the `__riscv_vlenb()` check from `platform.cpp`. The V extension guarantees VLEN >= 128, which is sufficient for the existing sixteen-float NCHWc block. - Keep the change confined to `onnxruntime/core/mlas/lib/platform.cpp`. ### Testing - Cross-compiled the RVV-enabled Release build with the XuanTie toolchain under `-Werror`: 1490 targets completed without errors. - Ran `onnxruntime_mlas_test` on a SpacemiT K3 (X100, VLEN=256): no failures. - Ran the relevant MLAS suites on a XuanTie A210 (C920V2, VLEN=128): 2344 passed and 0 failed with RVV enabled; 1800 passed and 0 failed with `ORT_MLAS_RISCV_FORCE_SCALAR=1`. - The forced-scalar run reduced the NCHWc-related test count from 549 to 5, confirming that the runtime fallback disables the NCHWc RVV path. A physical riscv64 system without the V extension was not available for testing; the scalar fallback was validated through the environment override.