[CPU][ARM] ARM NEON load/store fix for int8/uint8 (#32781)
Implemented an ARM NEON load/store fix so int8/uint8 vectors are read
lane‑by‑lane instead of pulling a full 16‑byte block and overrunning
buffers. In
src/plugins/intel_cpu/src/nodes/kernels/aarch64/jit_uni_eltwise_generic.cpp
the i8/u8 branch now uses ld1 on individual byte lanes (with broadcast
still using the old helper) and only then performs the sign/zero
extends, preventing illegal memory accesses when mixed‑precision eltwise
ops hit the JIT.
