openvino
[CPU][RV64] Implemented RISCV64 JIT emitter for SoftSign operation
#31749
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[CPU][RV64] Implemented RISCV64 JIT emitter for SoftSign operation #31749

aobolensk merged 24 commits into openvinotoolkit:master from RudraCodesForU:riscv64-softsign-jit-emitter
RudraCodesForU
RudraCodesForU Implemented RISCV64 JIT emitter for SoftSign operation
288cd8e2
RudraCodesForU RudraCodesForU requested a review 281 days ago
RudraCodesForU RudraCodesForU requested a review 281 days ago
RudraCodesForU RudraCodesForU requested a review 281 days ago
RudraCodesForU RudraCodesForU removed review request 281 days ago
RudraCodesForU RudraCodesForU requested a review from mlukasze mlukasze 281 days ago
RudraCodesForU Merge branch 'master' into riscv64-softsign-jit-emitter
6a375aa6
a-sidorova a-sidorova added this to the 2025.3 milestone 279 days ago
a-sidorova a-sidorova removed this from to the 2025.3 milestone 279 days ago
a-sidorova a-sidorova added this to the 2025.4 milestone 279 days ago
a-sidorova a-sidorova added platform: risc-v
a-sidorova a-sidorova assigned a-sidorova a-sidorova 279 days ago
a-sidorova a-sidorova assigned aobolensk aobolensk 279 days ago
a-sidorova a-sidorova requested a review from aobolensk aobolensk 279 days ago
RudraCodesForU last commit:Deleted the non-required sub folder
9cef6ae0
RudraCodesForU Merge branch 'riscv64-softsign-jit-emitter' of https://github.com/Rud…
e9a86d81
aobolensk
aobolensk commented on 2025-08-18
aobolensk Merge branch 'master' into riscv64-softsign-jit-emitter
4770fe91
github-actions github-actions added category: CPU
sys-openvino-ci sys-openvino-ci added ExternalPR
RudraCodesForU Merge branch 'master' into riscv64-softsign-jit-emitter
1fb501ce
aobolensk Merge branch 'master' into riscv64-softsign-jit-emitter
cba683a0
RudraCodesForU Reduced vector registers to one for better computation
76b24bae
RudraCodesForU Merge branch 'riscv64-softsign-jit-emitter' of https://github.com/Rud…
c05ffd4a
RudraCodesForU Merge branch 'master' into riscv64-softsign-jit-emitter
ddcd0889
RudraCodesForU Updated acc to codebase style
7d119186
RudraCodesForU Merge branch 'riscv64-softsign-jit-emitter' of https://github.com/Rud…
03ad86bd
RudraCodesForU Merge branch 'master' into riscv64-softsign-jit-emitter
4d83c2cd
RudraCodesForU Merge branch 'master' into riscv64-softsign-jit-emitter
1486cdb6
RudraCodesForU Merge branch 'master' into riscv64-softsign-jit-emitter
25cdbda3
RudraCodesForU Updated acc to clang style
c9fbe05e
RudraCodesForU Merge branch 'riscv64-softsign-jit-emitter' of https://github.com/Rud…
4683d853
RudraCodesForU Merge branch 'master' into riscv64-softsign-jit-emitter
012783d2
RudraCodesForU Merge branch 'master' into riscv64-softsign-jit-emitter
8987535e
RudraCodesForU Merge branch 'master' into riscv64-softsign-jit-emitter
b94f3276
RudraCodesForU Merge branch 'master' into riscv64-softsign-jit-emitter
c17f5277
aobolensk
aobolensk commented on 2025-09-30
aobolensk Update src/plugins/intel_cpu/src/emitters/plugin/riscv64/jit_eltwise_…
f8f375a6
aobolensk Update src/plugins/intel_cpu/src/emitters/plugin/riscv64/jit_eltwise_…
76b2f948
aobolensk Update src/plugins/intel_cpu/src/emitters/plugin/riscv64/jit_eltwise_…
70034216
aobolensk
aobolensk
aobolensk approved these changes on 2025-09-30
aobolensk aobolensk changed the title Implemented RISCV64 JIT emitter for SoftSign operation [CPU][RV64] Implemented RISCV64 JIT emitter for SoftSign operation 236 days ago
aobolensk aobolensk merged feb7fac0 into master 236 days ago

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category: CPU ExternalPR platform: risc-v
Milestone
2025.4
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