vllm
a15a50fc - [CPU] Enable shared-memory based pipeline parallel for CPU backend (#21289)
Commit
View On GitHub
Commit
144 days ago
[CPU] Enable shared-memory based pipeline parallel for CPU backend (#21289) Signed-off-by: jiang1.li <jiang1.li@intel.com>
Author
bigPYJ1151 bigPYJ1151
Parents
6dda13c8
FAQ Terms Privacy Refunds Impressum
Loading