llvm

3ee61287 - [SYCL] PR 6 - Remove FPGA Attributes from SYCL FE (#21785)

[SYCL] PR 6 - Remove FPGA Attributes from SYCL FE (#21785) This removes the following attributes: [[intel::loop_coalesce]] [[intel::max_interleaving]] [[intel::scheduler_target_fmax_mhz]] [[intel::use_stall_enable_clusters]]