LLVM and SPIRV-LLVM-Translator pulldown (WW10 2024) #12939
bb-sycl
merged
794 commits into
sycl
from
llvmspirv_pulldown
[RemoveDIs] Follow up to 6b62a9135a2, fix a ICmpInst constructor call
df525216
[lldb/Test] Fix oversight in ProcessEventDataTest::SetUp (NFC) (#83895)
f32c6b28
[InstCombine] Fix infinite loop due to incorrect `DoesConsume` (#82973)
abe4677d
[lldb/lua] Fix Lua building on Windows (#83871)
79e8f29a
[mlir][transform] replace original op to loop ops (#83537)
0597644a
[AArch64] Optimize abs, neg and copysign for fp16/bf16
930e7ff9
AMDGPU: Proper use of HasImageInsts in vimage inst definitions, NFC (…
1c9125cd
[clang-format][doc] fix documentation for clang-format (#83415)
3b5965e6
[SPIR-V] Fix warning -Wsometimes-uninitialized (#83901)
72cf95df
[libc][test] update constants used in stdbit test (#83893)
93e423f1
[AArch64] Use SHLLv4i16 to shift+widen BF16 to F32.
be3eeea7
[OpenACC] Enable serial/kernels Compute Constructs
bb97c992
[mlir][sparse][nfc] fixed typo in "translate" (#83891)
e10dc60a
Update Benchmark (#83488)
2e93ee6a
[mlir] GEMM Hopper Tensor Core Integration Test (#81478)
d95e6d02
[profdata][nfc] Disable several tests on Windows (#83907)
922a431e
Revert "Update Benchmark (#83488)"
aec6a04b
[HLSL][SPIR-V] Add SV_DispatchThreadID semantic support (#82536)
6325dd57
[LV] Handle scalable VFs in optimizeForVFAndUF (#82669)
df9ba135
[libc][test][stdbit] fix has_single_bit test names (#83904)
eaa0d3b1
Reapply "Update Benchmark (#83488)" (#83916)
a5b79717
[SROA] Unfold gep of index phi (round 2) (#83494)
8848258f
[mlir][sparse] add dim/lvl information to sparse_tensor.print (#83913)
691fc7cd
[AArch64] Also promote vector bf16 INT_TP_FP to f32
8cc8fdaf
[mlir][sparse] support sparsifying batch levels (#83898)
52b69aa3
[InstallAPI] Collect symbols from ObjC Ivars (#83632)
10ccde30
[Analysis] Move `DomConditionCache::findAffectedValues` to a new file…
3bc0ff28
[Analysis] Share `findAffectedValues` between DomConditionCache and A…
6ee46aba
[Analysis] Unify most of the tracking between AssumptionCache and Dom…
db3bbe03
[libc] Include stdfix.h in baremetal targets (#83900)
82cc2a67
[libc++] Don't generate the modulemap file (#80352)
6fd27d5b
[libc++] Do not forward-declare syncstream outside experimental (#82511)
4d80df09
[libc++] Use __wrap_iter in string_view and array in the unstable ABI…
5174b380
[libc++] Fix diagnostic for <stdatomic.h> before C++23 (#83351)
40081a45
[LLVM][NFC] Ignore including the GNUInstallDirs on the GPU (#83910)
07b1aebc
[lldb/crashlog] Fix breaking changes in textual report format (#83861)
5000e4c2
[lldb] Enable a test that was never enabled (#83925)
488ac3d5
[mlir][sparse] migration to sparse_tensor.print (#83926)
05390df4
[clang-tidy] CRTP Constructor Accessibility Check (#82403)
8e56fb82
[LLVM] Partially revert GPU change to include dirs
1ebbf973
[X86] Use update_mir_test_checks.py to generate CHECK lines in masked…
bdfebc31
[LSR][term-fold] Ensure the simple recurrence is from the current loo…
8d6e867e
[Clang] Fixes of builtin definitions after PR #68324. (#81022)
57592e9a
[Driver][RISCV] Forward --no-relax option to linker for RISC-V on *BS…
81617f85
[X86] Resolve FIXME: Add FPCW as a rounding control register (#82452)
3e40c96d
[mlir][sparse] support complex type for sparse_tensor.print (#83934)
275fe3ae
[LoongArch] Switch to the Machine Scheduler (#83759)
a5c90e48
[mlir][vector]Add Vector bitwidth target to Linearize Vectorizable an…
6f5c4f2e
[BOLT] Add reading support for Linux kernel exception table (#83100)
ccf0c8da
Revert "[ORC][JITLink] Add Intel VTune support to JITLink (#81826)"
1a67dee0
Add support for x87 registers on GISel register selection (#83528)
564b81db
[X86][NFC] Clang-format X86DisassemblerDecoder.h
377feaea
[MLIR] Fix crash in notifyBlockInserted() debug output (NFC)
65a8e3a4
[RISCV] Add support of Sscofpmf (#83831)
0fbe45bd
[clang][Sema] Warn on return of pointer/reference to compound literal…
9dab2e30
[X86][TableGen] Fix the mnemonic table for CMPCCXADD
7cd32688
[clang][Interp] Diagnose comparisions against weak function pointers
cec2073f
[bzl] Remove obsolete `output_to_genfiles = True` (#83944)
d016712b
[mlir][sparse] migrate datastructure tests to sparse_tensor.print (#8…
662d821d
[PowerPC][NFC] Update aix-tls-xcoff-reloc.ll (#83764)
ed627586
[InstCombine] Simplify nested selects with implied condition (#83739)
0c473633
[RISCV] Remove note of Sscofpmf and add a newline after FeatureStdExt…
3cb999c4
[libc++][sstream] P2495R3: Interfacing `stringstream`s with `string_v…
80f9458c
[clang][Builtins] Parse clang extended vectors types. (#83584)
9b672de9
[mlir][NFC] Apply rule of five to *Pass classes (#80998)
90e9e962
Apply clang-tidy fixes for modernize-loop-convert in Barvinok.cpp (NFC)
a36b73e5
Apply clang-tidy fixes for modernize-use-emplace in Barvinok.cpp (NFC)
99154181
Apply clang-tidy fixes for performance-unnecessary-value-param in Bar…
2db8b941
Apply clang-tidy fixes for readability-container-size-empty in Barvin…
1934fc6a
Apply clang-tidy fixes for readability-simplify-boolean-expr in Integ…
1837579b
[mlir]use correct iterator when eraseOp (#83444)
46f65e45
[lld][LoongArch] Support the R_LARCH_{ADD,SUB}_ULEB128 relocation typ…
eaa9ef67
Replace copy with a reference. (#82485)
0e337c67
[FileCheck] Fix parsing empty global and pseudo variable names (#83667)
3105cfe7
Revert "[flang] disable memory-allocation-opt.fir test on windows" (#…
ad5aea37
[flang] Deallocate structure constructor allocatable components (#83824)
74dfded4
[flang] Implement passing of assumed-type actual arguments. (#83851)
2984699a
[Github Automation] Allow colon after cherry-pick command (#81002)
9a894e7d
[Docs] Update frontend perfomance tips about loads/stores (#83833)
ff66e9b7
[Clang] Fix looking for immediate calls in default arguments. (#80690)
d773c00e
[clang] Support `__is_trivially_copyable(int()&)==false` (#81298)
690bf64f
[LangRef] Add aligned attribute description into masked.compress/expa…
68622337
[analyzer][NFC] Remove dead code (#83968)
88414c88
[IR] Update comment in Verifier::visitPHINode
c5d16e76
[mlir] Apply ClangTidy findings
16f2a1fb
[AArch64] Be stricter about insert/extract index
56abb8d5
[mlir] Followup fix, added noexcept in wrong place
0709eeb5
[Flang][OpenMP] : Add a temporary lowering for workshare directive (#…
b585c43d
[DAGCombiner] Handle extending EXTRACT_VECTOR_ELTs in calculateBytePr…
a6688462
[AMDGPU] Rename get_MUBUF_ps and use it for MTBUF too. NFC. (#83991)
762f7625
[ObjC] Check entire chain of superclasses to see if class layout is s…
923ddf65
[X86] 2007-03-15-GEP-Idx-Sink.ll - regenerate test checks
191f7678
[X86] pr59305.ll - replace "X86-64" check prefix with "X64"
49f95052
[Support][NFC] Add test documenting that empty `Regex` pattern matche…
d1d2932c
[NVPTX] Remove sub.s16x2 instruction
20895965
[InstCombine] Fix Failure to convert vector fp comparisons that can b…
94a0dd5a
[TableGen] Fix wrong codegen of BothFusionPredicateWithMCInstPredicat…
de1f3387
[AMDGPU] Remove Base_MUBUF_Real_Atomic_gfx11. NFC. (#83994)
4693efe1
[AMDGPU] Only use the BUF Base_ prefix for multiple architectures. NFC.
67a7a5e8
[libc] Disable verbose logging messages on hermetic tests (#83954)
90e97e71
[LLVM][AArch64][CodeGen] Mark FFR as a reserved register. (#83437)
341d674b
Merge from 'sycl' to 'sycl-web'
9f294012
[clang] Use separator for large numeric values in overflow diagnostic…
c00c901f
[DAG] Teach SelectionDAGBuilder to read parameter alignment of compre…
d95a0d7c
[InstCombine] Handle scalable splat in `getFlippedStrictnessPredicate…
d51fcd4e
[X86][Inline] Skip inline asm in inlining target feature check (#83820)
e84182af
[AMDGPU] Use BUF multiclasses to reduce repetition. NFC. (#84003)
894f52fc
[Clang][Sema] Fix crash when using name of UnresolvedUsingValueDecl w…
a642eb89
[analyzer][NFC] Make CheckerDocumentation checker in-sync with actual…
0d8e16a0
[clang] Sequence C++20 Parenthesized List Init (#83476)
4ce737bf
[AMDGPU][PromoteAlloca] Correctly handle a variable vector index (#83…
4cf8b298
[lld][test] Fix sanitizer buildbot failure
d9b435c2
[InstCombine] Fix miscompilation in PR83947 (#83993)
a1a590ef
Revert "[ARM] R11 not pushed adjacent to link register with PAC-M and…
b2c16e7f
[mlir] Expose MLIR_ROCM_CONVERSIONS_ENABLED in mlir-config.h. (#83977)
f3be8427
[SLP]Add runtime stride support for strided loads.
1c2b79ad
[mlir][irdl] Add support for basic structural constraints in tblgen-t…
a64975f9
Export `LLVM_VERSION_MAJOR` CMake variable as a directory property (#…
fac791d4
[mlir][py] better support for arith.constant construction (#83259)
a691f65a
[NFC][RemoveDIs] Insert instruction using iterators in Transforms/
2fe81ede
[lld][LoongArch] Fix handleUleb128
a41bcb39
[SCEVExpander] Use PoisoningVH for OrigFlags
6409c218
[PhaseOrdering][X86] Add test coverage for #67803
08e036e7
[infra] Add git to Linux container (#82687)
da63746b
[clangd] Add metric for rename decl kind (#83867)
ec7062d9
[libc] fix more readability-identifier-naming lints (#83914)
88d82b74
[libc] fix readability-identifier-naming in memory_utils/utils.h (#83…
640c8574
[libc] suppress readability-identifier-naming for std::numeric_limits…
2aa22ca2
[SLP][NFC]SPlit test/Transforms/SLPVectorizer/AArch64/getelementptr.ll,
169824ba
[CostModel][X86] Add test coverage for 'concat subvector' style shuffles
3b84b6f1
[Flang][MLIR][OpenMP] Create a deferred declare target marking proces…
afb05cd6
[clang] Add -Wmissing-designated-field-initializers (#81364)
7df43ccf
Merge from 'main' to 'sycl-web' (207 commits)
761b88b5
[AMDGPU] Remove unneeded BUF _impl multiclasses. NFC. (#84034)
e49479b8
[DAG] select (sext m), (add X, C), X --> (add X, (and C, (sext m)))) …
26058e68
[AArch64] Verify ldp/stp alignment stricter (#83948)
6b5888c2
[SystemZ] Use proper relocation for TLS variable debug info (#83975)
a8cb9db5
[SROA]: Only defer trying partial sized ptr or ptr vector types
1e828f83
[NFC][RemoveDIs] Always use iterators for inserting PHIs
f33f66be
[gn] port 6fd27d5b0321f (no more module.modulemap.in)
f836048a
AMDGPU: Make s_wait_samplecnt(_bvhcnt) dependent on hasImageInsts, NF…
1b1aea79
[SLP]Improve minbitwidth analysis.
a730ed7c
[HLSL] implement `mad` intrinsic (#83826)
643b31db
[TextAPI] add missing platforms for translating triples to tapi targets
06fea933
[HLSL] implement exp intrinsic (#83832)
b2ca23ae
[HLSL] implement the any intrinsic (#83903)
2807ea6b
[gn] Remove ScudoBenchmarks
9f67f196
[flang] Catch more bad pointer initialization targets (#83731)
233f750c
[libc][stdbit] implement stdc_bit_width (C23) (#83892)
041638c4
[gn build] Port 1a67dee08913
aa4e3d59
[gn build] Port 8e56fb824a43
97e9780e
[gn build] Port a8cb9db5f59d
caad3794
[clang] Diagnose config_macros before building modules (#83641)
ee044d5e
[SLP][NFC]Use TargetTransformInfo:: instead of TTI:: in BoUpSLP to avoid
083d8aa0
[lldb] Log to system log instead of stderr from Host::SystemLog (#83366)
1b812f9c
[flang] Fix bogus error message about invalid polymorphic entity (#83…
3cef82d6
[KnownBits] Add API for `nuw` flag in `computeForAddSub`; NFC
61c06775
[KnownBits] Make `nuw` and `nsw` support in `computeForAddSub` optimal
17162b61
[flang] NULL(NULL(NULL(...(NULL()...))) means NULL() (#83738)
9a20612d
Remove constant local variable (#83850)
d35f2c43
[flang] Rework F'2023 constraint C1167 checking (#83888)
069aee07
[benchmark] Delete WORKSPACE bzl files (#84013)
cc7544e2
Fix remaining build failures with GCC 8.3 (#83266)
a9304edf
[flang] Skim usage before marking unknown module externals as subrout…
13cd0a90
[Fuchsia] Include baremetal ARM builtins and libc (#83949)
b3b408bb
[flang] Emit "raw" name for procedure interface in module file (#83915)
83ca78de
[lldb] Print a message when background tasks take a while to complete…
2f343fc1
Revert "[SLP][NFC]Use TargetTransformInfo:: instead of TTI:: in BoUpS…
c8b3edcd
Revert "[SLP]Improve minbitwidth analysis."
aae152f1
Disable clang-tidy misc-include-cleaner (#83945)
64faa52b
[mlir][sparse] migrate tests to sparse_tensor.print (#84055)
b6ca6026
[libc++abi] Always re-export std:: exception types from libc++abi (#8…
b8c6252b
[SystemZ] [z/OS] Emit offset to PPA2 in separate MCSection (#84043)
eccc7178
Use the new ThreadPoolInterface base class instead of the concrete im…
4a4fb930
[OpenACC] Fix typo in StmtOpenACC.cpp header.
13bb726b
[compiler-rt/darwin] Disable building sanitizers on platforms without…
9faca1e4
[SPIR-V] Memory leak fix in SPIRVEmitIntrinsics (#83015)
7de6f61a
[RISCV] Add test for incorrect FP build vector lowering. NFC
a5095b98
[HLSL] implement the rcp intrinsic (#83857)
5a526624
[flang] Added lowering and runtime for COMPLEX(16) intrinsics. (#83874)
50d848d0
AMDGPU: Copy SubtargetPredicate from pseudo for DSDIR_Real (#84057)
bf631c63
[AArch64] Implement -fno-plt for SelectionDAG/GlobalISel
201572e3
[BOLT] Add reading support for Linux kernel .parainstructions section…
f51ade25
[InstCombine] Fix shift calculation in InstCombineCasts (#84027)
e96c0c1d
[RISCV] Always use signed APSInt in getExactInteger. (#84070)
58d8805f
[ORC][MachO] Simplify use of LC_BUILD_VERSION in JITDylib headers.
e77a4736
AMDGPU: Define HasExpOrExportInsts for export instruction definitions…
d6c52c1e
Revert "[AArch64] Verify ldp/stp alignment stricter" (#84096)
6f11c95d
[X86][AVX512BF16] Add a few missing insert/extract patterns
55c466da
[RISCV] Don't remove extends for i1 indices in mgather/mscatter (#83951)
02072704
[clang][RISCV] Reorder sema check for RVV type (#83553)
6c39e3fa
[RISCV][SiFive] Add RISCVUsage for SiFive Intelligence Extensions (#8…
2a1b09fe
[RISCV] Improve error message when the extension is not supported (#8…
11f74cd4
[Clang][LoongArch] Precommit test for fix wrong return value type of …
aeda1a6e
[clang-tidy] fix false negative in cppcoreguidelines-missing-std-forw…
8b326d59
[TTI] Add alignment argument to TTI for compress/expand support (#83516)
889d99a5
[SCEV] Migrate some tests to be autogenerated
31c304ba
Rename llvm::ThreadPool -> llvm::DefaultThreadPool (NFC) (#83702)
716042a6
[Clang][LoongArch] Fix wrong return value type of __iocsrrd_h (#84100)
2f479b81
[SCEV] Migrate a couple tests to be auto generated
987fe6fa
[lldb] Fix build failure in Debugger.cpp (NFC)
d32bcbf6
[InstrProf][NFC] Fix -Wimplicit-fallthrough warning in InstrProf.cpp …
f439c713
AMDGPU: Define and Use HasInterpInsts for interp inst definitions (#8…
49ec8b74
[RISCV] Move RISCVVType namespace to TargetParser (#83222)
85388a06
Revert "[mlir][py] better support for arith.constant construction" (#…
96fc5482
[gn build] Port 85388a06b602
929ceec7
[libomptarget] Fix libomptarget.rtl.amdgpu.so installation
0fa04b6e
[RISCV] Add TargetParser to MCA (#84109)
ae709c19
[WebAssembly] Use RefTypeMem2Local instead of Mem2Reg (#83196)
403b9cf1
[CUDA] Correctly set CUDA default architecture (#84017)
433b7118
[libc] Fix standalone cross compiling build for the GPU (#84042)
a30233f5
AMDGPU: Correct cycle counts for f64 mfma on gfx940 (#83782)
0f3628a9
[clangd] Make all calls to format::getStyle() go through getFormatSty…
5549b017
[clangd] Remove calls to getFileLoc() in declToSym() (#83532)
d1aec79a
[mlir][complex] Support fast math flag in converting complex.atan2 op…
b930b14d
[clangd] Show argument names for function pointer struct fields (#69011)
7bad74e6
[RISCV] Use uint32_t for NumOfVReg in getVLENFactoredAmount. (#84110)
5fb33110
Convert many LivePhysRegs uses to LiveRegUnits (#83905)
2a13422b
[nfc] Fix RTTI for `InstrProf` intrinsics (#83511)
3f7aa042
[AArch64] Fix fptoi/itofp for bf16
9e759f35
[RISCV] Hoist immediate addresses from loads/stores (#83644)
eceb24c4
[RISCV] Add tests for vsetvli/vsetvlimax with different SEW/LMUL
228c737b
Restore "Implement convergence control in MIR using SelectionDAG (#71…
60822637
[RISCV] Take SEW/LMUL into account for value tracking of vsetvli[max]…
95b52ecb
[gn build] Port 60822637bf00
6bf61283
[ELF] Improve wildcard tests for input section descriptions
5ff3f660
[ELF] Improve wildcard test
d3e79e4c
[C++20] [Modules] Handle transitive import in the module properly
d3df2a83
[RISCV] Add tests for vw{add,sub,mul} with nested extend. NFC
bec7ad9f
[clang] Add some CodeGen tests for CWG 4xx issues (#83715)
7a0acccd
[InstCombine] Fix infinite loop in select equivalence fold (#84036)
9f45c5e1
Merge from 'sycl' to 'sycl-web'
d773f0e4
[InstCombine] If inst in unreachable refers to an inst change it to p…
6cdf596c
[C23] Implement N3018: The constexpr specifier for object definitions…
aced81c0
[mlir][gpu] Replace MLIR_GPU_TO_HSACO_PASS_ENABLE by more generic one…
6e27dd47
[mlir][nvvm] Add missing include to llvm-config.h. (#83998)
d70254a6
[mlir] Remove noexcept again from move constructors.
0e5bde02
[AMDGPU] Don't form sext/abs/neg fp8 cvt (#83843)
52d5b8e0
[mlir][drr] Add warning for simple case of mismatched variadic. (#84040)
471a6128
[clang][NFC] Regroup declarations in `Sema` (#82217)
ac74d9ec
Merge from 'main' to 'sycl-web' (128 commits)
0d6e9bde
Merge from 'sycl' to 'sycl-web' (5 commits)
ee3fb55b
Merge from 'main' to 'sycl-web' (29 commits)
7dfc12d1
Remove internal values for SPV_INTEL_maximum_registers (#2387)
4f88a10f
Implement lowering of llvm.bitreverse.* (#2345)
31826eea
Use unordered_map for better performance (#2356)
89b4bc94
Fix TaskSequenceCreateINTEL instruction verification (#2384)
c7b35457
Remove extra semicolon (#2401)
949feede
Remove tail from atomic_compare_exchange_strong_explicit call (#2395)
4a58a77f
Handle OpVectorShuffle with differing vector sizes (#2391)
2483d62b
bb-sycl
approved these changes
on 2024-03-07
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