llvm-project

0075a8fb - [GVN] Support load PRE through select addresses (incl. indexed selects) (#203863)

[GVN] Support load PRE through select addresses (incl. indexed selects) (#203863) This resurrects and extends the approach from the reverted [D142705](https://reviews.llvm.org/D142705) ("[GVN] Support address translation through select instructions"), adapting it to the current GVN dependency model so that GVN can eliminate a redundant load whose address is a `select` hidden behind cast/GEP indexing (the classic `std::min_element` / min-index idiom, e.g. `data[*it] < data[*smallest]` or returning the index `minloc`). ### What it does When PHI translation of a load address fails along an edge because the incoming value resolves to a `select`, we now translate **both** sides of that select to obtain the "true" and "false" addresses. If both addresses have a dominating, non-clobbered value of the right type, the load is rematerialized as a `select` of those two values, letting the loop-carried value be threaded through a phi over the backedge — matching GCC's `tree-ssa-pre` behavior, which previously produced one fewer load in the inner loop. ### Implementation - `PHITransAddr`: `translateSubExpr` can resolve a select on a given condition to one side and propagate that through casts/GEPs; adds `getSelectCondition`, a pair-returning `translateValue`, the `SelectAddr` helper, and the value-preserving zext/sext-of-trunc fold. - `MemoryDependenceAnalysis`: adds `MemDepResult::Select`; `NonLocalDepResult` carries a `SelectAddr`; on phi-translation failure with a select-dependent address, both sides are translated and a select dependency is reported. - `GVN`: adds `DepKind::Select` to `ReachingMemVal` and `AnalyzeSelectAvailability`; `AvailableValue` stores the select condition so the value select can be materialized at the load location. ### Testing - Updated/added GVN regression tests, including negative cases (intervening clobbering store) and the indvars-canonicalized trunc form. - Ran the full GVN + MemoryDependenceAnalysis test suites and MemDep-consuming passes (MemCpyOpt/DSE/LICM) — all pass. - Ran llvm-test-suite (incl. SPEC CPU 2017 rate) for RISC-V `rva23u64` under QEMU: 2968/2968 tests PASS, no regressions. Fixes #58569 Fixes #178616 Assisted-by: TraeCli (AI assistant) Co-authored-by: Sergey Kachkov <sergey.kachkov@syntacore.com>