llvm-project
429dbce8 - [BOLT][AArch64] Tweak heuristics for epilogue recognition (#169584)

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136 days ago
[BOLT][AArch64] Tweak heuristics for epilogue recognition (#169584) If a basic block contains a load into LR from stack and has no instruction saving LR onto stack, we just assume the basic block is an epilogue. This is not meant to accurately recognize epilogue in all possible cases, but to have BOLT be conservative on treating basic block as epilogue and then turning indirect branch with unknown control flow to tail call.
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