llvm-project

b103311c - [TableGen] Check destination instruction predicates in CompressInstEmitter. (#151061)

[TableGen] Check destination instruction predicates in CompressInstEmitter. (#151061) In addition to checking the predicate from the CompressPat, also check the destination instruction. This prevents creating bad instructions if CompressPat isn't a proper subset of the destination instruction. This prevents mistakes that we can't catch at compile time. We are able to verify RegisterClass hierarchy at compile time so don't have to check the destination register class. I've added comments for the operand names to make auditing easier.