llvm-project

b9e01c26 - [RISCV] Relax VL constraint in convertSameMaskVMergeToVMv (#189797)

[RISCV] Relax VL constraint in convertSameMaskVMergeToVMv (#189797) When converting a PseudoVMERGE_VVM to PseudoVMV_V_V, we previously required MIVL <= TrueVL to avoid losing False elements in the tail. Relax this constraint when the vmerge's False operand equals its Passthru operand and the True instruction's tail policy is TU (tail undisturbed). In this case, True's tail lanes preserve its passthru value (which equals False and Passthru), so the conversion is safe even when MIVL > TrueVL. --------- Co-authored-by: Claude Opus 4.6 (1M context) <noreply@anthropic.com>