llvm-project

bdc151e0 - [CIR][AArch64] Add CIR tests for predicated SVE svdup_m builtins (#182307)

[CIR][AArch64] Add CIR tests for predicated SVE svdup_m builtins (#182307) This PR adds CIR lowering tests for the predicated SVE `svdup` builtins on AArch64. The corresponding ACLE intrinsics are documented at: https://developer.arm.com/architectures/instruction-sets/intrinsics The tests cover the merging-predicated variants (suffix `_m`, e.g. `svdup_n_f32_m`). These forms take an explicit inactive-lane value, which is merged into the result for lanes where the predicate is false. No functional changes are introduced. The existing lowering infrastructure already handles these builtins; this change adds test coverage only.