llvm-project
[RISCV] Rewrite deinterleave load as vlse optimization as DAG combine
#150049

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[RISCV] Rewrite deinterleave load as vlse optimization as DAG combine #150049

preames merged 8 commits into llvm:main from preames:pr-riscv-deinterleave-vlse-combine

[RISCV] Rewrite deinterleaveN one active as vlse optimization as DAG …

f78d5ef8

preames requested a review from

lukel97 149 days ago

preames requested a review from

mshockwave 149 days ago

preames requested a review from

topperc 149 days ago

llvmbot added backend:RISC-V

topperc commented on 2025-07-22

Merge branch 'main' into pr-riscv-deinterleave-vlse-combine

77b46fb7

Address review comment

0e1e8e52

mshockwave commented on 2025-07-25

topperc commented on 2025-07-25

Merge branch 'main' into pr-riscv-deinterleave-vlse-combine

9a5d7c2b

Address review comments

d2e7f2fe

Turn a check into an assert

73576588

Merge branch 'main' into pr-riscv-deinterleave-vlse-combine

7334fe98

Merge branch 'main' into pr-riscv-deinterleave-vlse-combine

bb9f9080

mshockwave approved these changes on 2025-07-29

preames merged 73245b06 into main 142 days ago

preames deleted the pr-riscv-deinterleave-vlse-combine branch 142 days ago

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topperc

lukel97

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