PR #151665 [RISCV][TTI] Enable masked interleave access

[RISCV][TTI] Enable masked interleave access #151665

Mel-Chen merged 4 commits into llvm:main from Mel-Chen:reland-enable-masked-interleave

Mel-Chen requested a review from

asb 96 days ago

Mel-Chen requested a review from

preames 96 days ago

Mel-Chen requested a review from

lukel97 96 days ago

llvmbot added backend:RISC-V

llvmbot added vectorizers

llvmbot added llvm:transforms

Mel-Chen requested a review from

alexey-bataev 96 days ago

lukel97 commented on 2025-08-01

Reland "[RISCV][TTI] Enable masked interleave access for scalable vec…

d850cbbc

Cherry-pick #150624

305e75fa

Remove limitation for EVL

767de324

Mel-Chen force pushed to 767de324 93 days ago

lukel97 approved these changes on 2025-08-04

Mel-Chen changed the title ~~Reland "[RISCV][TTI] Enable masked interleave access for scalable vector (#149981)"~~ [RISCV][TTI] Enable masked interleave access 93 days ago

Merge branch 'main' into reland-enable-masked-interleave

d48697fd

Mel-Chen merged 76d98cfc into main 92 days ago

Reviewers

lukel97

asb

preames

alexey-bataev

Assignees

No one assigned

Labels

backend:RISC-V vectorizers llvm:transforms

Milestone

No milestone

llvm-project [RISCV][TTI] Enable masked interleave access #151665 Merged

[RISCV][TTI] Enable masked interleave access #151665

llvm-project
[RISCV][TTI] Enable masked interleave access
#151665

Merged