llvm-project
[TableGen][DecoderEmitter][RISCV] Always handle `bits<0>`
#159951

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[TableGen][DecoderEmitter][RISCV] Always handle `bits<0>` #159951

s-barannikov merged 1 commit into llvm:main from s-barannikov:tablegen/decoder/bits-0-unconditional

llvmbot added tablegen

s-barannikov enabled auto-merge (squash) 135 days ago

s-barannikov force pushed 135 days ago

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llvmbot added backend:RISC-V

s-barannikov marked this pull request as draft 135 days ago

s-barannikov force pushed 135 days ago

[TableGen][Decoder] Always handle `bits<0>`

372ce871

s-barannikov force pushed to 372ce871 135 days ago

s-barannikov requested a review from

lenary 135 days ago

s-barannikov requested a review from

topperc 135 days ago

s-barannikov marked this pull request as ready for review 135 days ago

s-barannikov changed the title ~~[TableGen][Decoder] Always handle `bits<0>`~~ [TableGen][DecoderEmitter][RISCV] Always handle `bits<0>` 135 days ago

topperc approved these changes on 2025-09-22

s-barannikov merged 6a43c669 into main 134 days ago

s-barannikov deleted the tablegen/decoder/bits-0-unconditional branch 134 days ago

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llvm-project [TableGen][DecoderEmitter][RISCV] Always handle `bits<0>` #159951 Merged

[TableGen][DecoderEmitter][RISCV] Always handle `bits<0>` #159951

llvm-project
[TableGen][DecoderEmitter][RISCV] Always handle `bits<0>`
#159951

Merged