llvm-project
[RISCV] Update SiFive7's scheduling models with their optimizations on permutation instructions
#160763

Merged

[RISCV] Update SiFive7's scheduling models with their optimizations on permutation instructions #160763

mshockwave merged 1 commit into llvm:main from mshockwave:patch/rvv/sifive7-sched-model-fast-vrgather

mshockwave requested a review from

preames 5 days ago

mshockwave requested a review from

mikhailramalho 5 days ago

mshockwave requested a review from

topperc 5 days ago

mshockwave requested a review from

wangpc-pp 5 days ago

llvmbot added backend:RISC-V

[RISCV] Update SiFive7's scheduling model with its permutation instru…

f87dcca5

mshockwave force pushed from ffe211c1 to f87dcca5 5 days ago

wangpc-pp approved these changes on 2025-09-26

mshockwave merged 24bc1a60 into main 4 days ago

mshockwave deleted the patch/rvv/sifive7-sched-model-fast-vrgather branch 4 days ago

Reviewers

wangpc-pp

preames

mikhailramalho

topperc

Assignees

No one assigned

Labels

backend:RISC-V

Milestone

No milestone