[X86] Fix some values for Znver4 model #161405
RKSimon
merged
22 commits into
llvm:main
from
NexusXe:znver4-work
RKSimon
commented
on 2025-09-30
RKSimon
requested changes
on 2025-10-01
fix documentation reference
fe000855
better HighLatency value
092492a2
LEA metrics
bc45c699
(CMP)XCHG uops
fd6f87f7
(I)DIV values from docs/uops.info
a67c2522
use zen4 BSF/BSR uops count
cc5fc0dc
TZCNT in 1 uop
3555807b
some higher latency string instructions
48d84d29
use Zen4 CLMUL/VPERM(S/D) values
8d345ddf
replace FIXME for latency
d1bf965c
revert multiop ReleaseAtCycles value
de77a33c
fix RAC for Zn4WriteVPERMPSYrm
de0daad8
fix RAC for Zn4Write3OpsLEA
a6621ca5
regenerate resource files
603d9b89
revert LEA changes
de26eec1
CMPXCHG8B better TP
ceec2202
VPERMD uops
3f10cb45
fix CMPXCHG16B
02d554c5
VALIGN has different latency depending on width
e4c78529
update resource files
d300f5ee
Merge branch 'main' into znver4-work
0136fd20
Merge branch 'main' into znver4-work
af4309e7
RKSimon
approved these changes
on 2025-10-22
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