llvm-project
[RISCV][ISelLowering] Use Zicond for FP selects on Zfinx/Zdinx
#169299
Merged

[RISCV][ISelLowering] Use Zicond for FP selects on Zfinx/Zdinx #169299

tclin914 merged 15 commits into llvm:main from fennecJ:RISCV_SELECT_OPT
fennecJ
llvmbot llvmbot added backend:RISC-V
llvmbot
github-actions
fennecJ fennecJ force pushed from 865ee328 to fe46a46e 106 days ago
fennecJ
topperc
topperc commented on 2025-11-24
fennecJ fennecJ requested a review from topperc topperc 106 days ago
topperc
topperc commented on 2025-11-24
topperc
topperc commented on 2025-11-24
topperc
topperc commented on 2025-11-24
fennecJ fennecJ requested a review from topperc topperc 106 days ago
fennecJ fennecJ force pushed from 5f91d261 to bf53e56c 106 days ago
fennecJ
lenary
lenary commented on 2025-11-24
fennecJ
fennecJ fennecJ requested a review from lenary lenary 105 days ago
lenary
fennecJ
fennecJ
fennecJ fennecJ force pushed from 2d5b2f98 to b1cad4dd 105 days ago
fennecJ fennecJ force pushed from b1cad4dd to 5778116b 105 days ago
lenary
lenary
lenary commented on 2025-11-25
topperc
topperc commented on 2025-11-25
topperc
topperc commented on 2025-11-25
fennecJ fennecJ requested a review from lenary lenary 104 days ago
fennecJ fennecJ requested a review from topperc topperc 104 days ago
github-actions
fennecJ [RISCV][ISelLowering] Use Zicond for FP selects on Zfinx/Zdinx
2623c956
fennecJ Add test for zicond zf/dinx select lowering
8ea2e880
fennecJ Refine FPinGPR checking logic
2d43f378
fennecJ Fix f16 Zicond SELECT lowering with Zhinx
1336a591
fennecJ Add unit test for half zicond lowering
6a1e9cc8
fennecJ Revise zicond with zfinx implement
aa4eba6d
fennecJ Update test file via update_llc_test_checks.py
1682fb67
fennecJ Handle RV32 with f64 Zdinx
3e181355
fennecJ Add testcase for rv32zdinx
23f5ad70
fennecJ Skip Zicond for FP sel when we need to split regs
dafc8b59
fennecJ Optimize Zicond lowering for FP selects with +0.0
a63b0030
fennecJ Update unit test result to align newest commit
082474e5
fennecJ Refine const zero casting logic
3b721ca2
fennecJ Add test for F16 select feeding into arithmetic op
ef97fca1
fennecJ
fennecJ fennecJ force pushed from efca401c to ef97fca1 104 days ago
lenary
lenary approved these changes on 2025-11-26
tclin914
tclin914 commented on 2025-11-27
fennecJ Refine FP Zicond ISel logic
7cd5abcd
fennecJ fennecJ requested a review from tclin914 tclin914 103 days ago
tclin914
tclin914 approved these changes on 2025-11-27
fennecJ
fennecJ
tclin914 tclin914 merged 2e21bb81 into main 99 days ago
fennecJ

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