[AMDGPU] Remove alignment constraint from spill pseudos #177317
arsenm
commented
on 2026-01-22
arsenm
requested changes
on 2026-01-22
[AMDGPU] Remove alignment constraint from spill pseudos
7cf8595b
easyonaadit
force pushed
from
3c895530
to
fb788e53
18 days ago
Lower misaligned register spills to 32-bit access.
47ddde72
easyonaadit
force pushed
from
fb788e53
to
47ddde72
18 days ago
arsenm
commented
on 2026-02-11
Use ProperlyAlignedRC to check for misalignment
4c6bb588
arsenm
commented
on 2026-02-11
Get register class alignment check from operand
cc7ab968
Check if register tuple is unaligned
d15cc456
Refactor: Clang-format off
a832cb65
easyonaadit
force pushed
from
32059013
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a832cb65
11 days ago
arsenm
commented
on 2026-02-18
Review comments:
7123272c
Use only register classes for checks.
e1999372
Formatting
08776e0f
arsenm
commented
on 2026-02-19
Use `findCommonRegClass` API.
0f415a3e
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