llvm-project
[RISCV] Improve getInterleavedMemoryOpCost for interleave groups with tail gaps.
#192074
Merged
Go
Login via GitHub
Home
Pricing
FAQ
Install
Login
via GitHub
Overview
Commits
3
Changes
View On
GitHub
[RISCV] Improve getInterleavedMemoryOpCost for interleave groups with tail gaps.
#192074
Mel-Chen
merged 3 commits into
llvm:main
from
Mel-Chen:strided-seg-store
Mel-Chen
requested a review
from
eas
69 days ago
Mel-Chen
requested a review
from
preames
69 days ago
Mel-Chen
requested a review
from
lukel97
69 days ago
Mel-Chen
requested a review
from
mshockwave
69 days ago
Mel-Chen
requested a review
from
topperc
69 days ago
Mel-Chen
requested a review
from
ElvisWang123
69 days ago
Mel-Chen
force pushed
from
04ec8762
to
0af6b10a
67 days ago
Mel-Chen
force pushed
from
0af6b10a
to
98dd68a9
67 days ago
Mel-Chen
marked this pull request as ready for review
67 days ago
llvmbot
added
backend:RISC-V
llvmbot
added
llvm:transforms
eas
commented on 2026-04-16
lukel97
commented on 2026-04-16
ElvisWang123
commented on 2026-04-17
Mel-Chen
force pushed
from
98dd68a9
to
83a41be7
61 days ago
lukel97
approved these changes on 2026-04-22
Mel-Chen
force pushed
from
83a41be7
to
6663051b
56 days ago
strided seg store
df25625e
Replace scalar access cost with basic cost
53ea2115
Add assertion for Indices
9dfc9fca
Mel-Chen
force pushed
from
6663051b
to
9dfc9fca
55 days ago
Mel-Chen
enabled auto-merge (squash)
55 days ago
Mel-Chen
merged
eec2249a
into main
55 days ago
Login to write a write a comment.
Login via GitHub
Reviewers
lukel97
arcbbb
ElvisWang123
eas
preames
mshockwave
topperc
Assignees
No one assigned
Labels
backend:RISC-V
llvm:transforms
Milestone
No milestone
Login to write a write a comment.
Login via GitHub