PR #236522 [Hexagon] Allocate M and CS registers as a pair

[Hexagon] Allocate M and CS registers as a pair #236522

quic-akaryaki merged 1 commit into llvm:main from quic-akaryaki:hexagon-cs-regs

[Hexagon] Allocate M and CS registers as a pair

4dd1928b

quic-akaryaki requested a review from

androm3da 8 days ago

quic-akaryaki marked this pull request as ready for review 8 days ago

quic-akaryaki requested a review from

yandalur 8 days ago

llvmorg-github-actions added backend:Hexagon

yandalur approved these changes on 2026-10-29

androm3da approved these changes on 2026-10-29

quic-akaryaki merged e2267e9b into main 8 days ago

quic-akaryaki deleted the hexagon-cs-regs branch 7 days ago

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backend:Hexagon

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