onnxruntime

ec82e2a3 - [CUDA] Extract GQA seq-free route eligibility into shared helpers (#33001)

[CUDA] Extract GQA seq-free route eligibility into shared helpers (#33001) ## Description Factors the **sequence-length-independent** parts of the CUDA `GroupQueryAttention` backend-selection logic out of `GroupQueryAttention::ComputeInternal` into a new header-only module, `group_query_attention_eligibility.h`. It provides four pure "seq-free" route-eligibility predicates: | Helper | Route | |---|---| | `IsGQAXqaEligibleSeqFree<U>` | XQA (Extreme Query Attention) decode kernel | | `IsGQACudnnSdpaCoreEligibleSeqFree<T, U>` | cuDNN SDPA | | `IsGQAFlashEligibleSeqFree<T>` | FlashAttention | | `IsGQAMemoryEfficientEligibleSeqFree<T>` | CUTLASS memory-efficient attention | A **seq-free** predicate depends only on partition-time facts (geometry, device capability, quantization, feature flags) and *not* on the per-step sequence length or phase (prompt vs decode). The runtime keeps the sequence-length-dependent gates and dispatch priorities at the call sites: - **XQA** — phase gates (`is_first_prompt` / `sequence_length == 1` / `kv_sequence_length`) and the per-node shared-memory capability probe. - **cuDNN** — `cudnn_sdpa::is_stable()` and the seq-dependent `is_supported(...)` probe. - **Flash / MEA** — the `!use_xqa` / `!use_cudnn_sdpa` / `!use_flash_attention` dispatch priority. ## No functional change The eligibility booleans are computed from the same expressions in the same short-circuit-equivalent order. Every moved term is a side-effect-free read, so the selected backend is identical for every input. The GQA operator tests exercise all four routes and validate this (a wrong predicate would dispatch the wrong kernel and fail the tests). ## Why header-only All four helpers are templated on the Q/KV element types (`T`/`U`), so the module is header-only rather than the usual `.h`/`.cc` split. ## Motivation This is a small NFC step toward **policy-based, capacity-aware CPU offloading** (see the design doc in #32944). The shared seq-free core is what the Level-1 workspace estimator will later reuse, so runtime route selection and workspace estimation cannot drift. ## Relationship to sibling PRs - #32944 — design doc (policy-based workspace estimation). - #32945 — consolidates GQA **scratch sizing** into recipe helpers. This PR is the sibling that consolidates **route eligibility**. Both are independent NFC refactors; whichever merges second will need a trivial merge in the XQA/Flash region of `group_query_attention.cc`. --------- Co-authored-by: Copilot <223556219+Copilot@users.noreply.github.com> Copilot-Session: 7fa98d07-aec3-41b7-92b8-b0ec317a95bf Copilot-Session: 37ad7066-fcd3-45df-891e-44bee9e1cf04