vllm
[Fix] Improve CPU backend compatibility for RISC-V
#25816

Merged

[Fix] Improve CPU backend compatibility for RISC-V #25816

hmellor merged 1 commit into vllm-project:main from ihb2032:fix/cpu-riscv-compatibility

ihb2032 requested a review from

LucasWilkinson 128 days ago

mergify added v1

gemini-code-assist commented on 2025-09-28

ihb2032 changed the title ~~[Fix] Improve CPU backend compatibility for RISC-V~~ [Fix] Improve CPU backend compatibility for RISC-V issue#25737 128 days ago

ihb2032 changed the title ~~[Fix] Improve CPU backend compatibility for RISC-V issue#25737~~ [Fix] Improve CPU backend compatibility for RISC-V 128 days ago

ihb2032 requested a review from

NickLucche 128 days ago

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mergify added documentation

mergify added ci/build

mergify added deepseek

mergify added frontend

mergify added llama

mergify added multi-modality

mergify added new-model

mergify added performance

mergify added qwen

mergify added gpt-oss

mergify added rocm

mergify added structured-output

mergify added speculative-decoding

mergify added tpu

mergify added tool-calling

mergify assigned

sangstar 128 days ago

mergify added kv-connector

mergify added needs-rebase

ihb2032 force pushed from fe303c1c to 253aa7dc 128 days ago

mergify removed tpu

mergify removed needs-rebase

gemini-code-assist commented on 2025-09-28

mergify added tpu

gemini-code-assist commented on 2025-09-28

ihb2032 force pushed from 1bbfd155 to 28df2570 128 days ago

hmellor requested changes on 2025-09-29

mergify removed tpu

hmellor requested changes on 2025-09-29

ihb2032 force pushed from 7a6c0a2a to 34b166ab 126 days ago

ihb2032 force pushed from 34b166ab to 28268a49 126 days ago

ihb2032 force pushed from 28268a49 to b1d7bcff 126 days ago

ihb2032 force pushed from b1d7bcff to 536a0a6f 126 days ago

ihb2032 requested a review from

hmellor 126 days ago

hmellor requested changes on 2025-09-30

ihb2032 force pushed from 536a0a6f to 00caf1c7 126 days ago

ihb2032 force pushed from 00caf1c7 to c372e7c5 126 days ago

ihb2032 force pushed from c372e7c5 to 8d44d6aa 126 days ago

ihb2032 force pushed from 8d44d6aa to 40a0083f 126 days ago

Fix(cpu): Add riscv to chunked_prefill exclusion list

cf276f54

ihb2032 force pushed from 40a0083f to cf276f54 126 days ago

ihb2032 requested a review from

hmellor 126 days ago

hmellor approved these changes on 2025-09-30

hmellor enabled auto-merge (squash) 126 days ago

github-actions added ready

hmellor merged bb6d4304 into main 126 days ago

ihb2032 deleted the fix/cpu-riscv-compatibility branch 126 days ago

Reviewers

hmellor

gemini-code-assist

LucasWilkinson

NickLucche

gshtras

tdoublep

patrickvonplaten

luccafong

sighingnow

jikunshang

bigPYJ1151

ApostaC

jeejeelee

mgoin

youkaichao

yewentao256

WoosukKwon

robertgshaw2-redhat

njhill

ywang96

comaniac

alexm-redhat

heheda12345

russellb

aarnphm

DarkLight1337

tlrmchlsmth

simon-mo

benchislett

22quinn

houseroad

ProExpertProg

zou3519

chaunceyjiang

zhuohan123

Assignees

sangstar

Labels

documentation performance new-model rocm structured-output frontend speculative-decoding ready ci/build v1 multi-modality tool-calling llama qwen deepseek gpt-oss kv-connector

Milestone

No milestone

vllm [Fix] Improve CPU backend compatibility for RISC-V #25816 Merged

[Fix] Improve CPU backend compatibility for RISC-V #25816

vllm
[Fix] Improve CPU backend compatibility for RISC-V
#25816

Merged