llvm-project
[CIR][AMDGPU] Lower Language specific address spaces and implement AMDGPU target
#179084
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Commits
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Commits
  • [CIR] Address Space support for GlobalOps
    RiverDave committed 11 days ago
  • Global AS lowering For CUDA and CIRGen tests for target AS
    RiverDave committed 11 days ago
  • fix fmt
    RiverDave committed 11 days ago
  • more fmt yo
    RiverDave committed 11 days ago
  • [CIR][AMDGPU] Lower Language specific address spaces and implement AMDGPU target
    RiverDave committed 11 days ago
  • handle formatting
    RiverDave committed 11 days ago
  • fix tests to represent pre-target lowering state of AS
    RiverDave committed 11 days ago
  • Use AMDGPU enums to map CIR AS
    RiverDave committed 11 days ago
  • more fmt
    RiverDave committed 11 days ago
  • proper amdgpu constant AS encoding
    RiverDave committed 11 days ago
  • Coverage for AS target lowering and fix generic lowering conversion pattern on alloca types.
    RiverDave committed 11 days ago
  • add ogcg cuda checks and todo on nptx lowering
    RiverDave committed 11 days ago
  • Add table-based CIR -> Target AS mapping
    RiverDave committed 11 days ago
  • fix code dup rebase bug
    RiverDave committed 11 days ago
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