llvm-project
[CIR][AMDGPU] Lower Language specific address spaces and implement AMDGPU target
#179084

Open

[CIR][AMDGPU] Lower Language specific address spaces and implement AMDGPU target #179084

RiverDave wants to merge 14 commits into main from users/riverdave/langas-lowering-and-amdgpuimpl

RiverDave marked this pull request as ready for review 52 days ago

RiverDave requested a review from

lanza 52 days ago

RiverDave requested a review from

bcardosolopes 52 days ago

RiverDave requested a review from

xlauko 52 days ago

RiverDave requested a review from

andykaylor 52 days ago

llvmbot added clang

llvmbot added backend:AMDGPU

llvmbot added ClangIR

RiverDave requested a review from

koparasy 52 days ago

arsenm commented on 2026-02-01

RiverDave force pushed from a51d3a2a to ea88636f 49 days ago

RiverDave force pushed from ea88636f to d086dbf1 49 days ago

RiverDave force pushed from d086dbf1 to 0f759532 13 days ago

RiverDave force pushed from 0f759532 to a8c797b9 12 days ago

koparasy commented on 2026-03-13

Base automatically changed from users/riverdave/as-for-globalops to main 5 days ago

RiverDave force pushed from 55e626c7 to 0d2b860c 5 days ago

[CIR] Address Space support for GlobalOps

dbcf5dbf

Global AS lowering For CUDA and CIRGen tests for target AS

15a710ca

fix fmt

5a8ac3a7

more fmt yo

78958e41

[CIR][AMDGPU] Lower Language specific address spaces and implement AM…

a10ea33d

handle formatting

f8275f3f

fix tests to represent pre-target lowering state of AS

3d717d97

Use AMDGPU enums to map CIR AS

6057355e

more fmt

2e2eaeca

proper amdgpu constant AS encoding

310b5a4a

Coverage for AS target lowering and fix generic lowering conversion p…

5cc9d6c6

add ogcg cuda checks and todo on nptx lowering

cc0db584

Add table-based CIR -> Target AS mapping

bdf36bc0

RiverDave force pushed from 0d2b860c to bdf36bc0 5 days ago

fix code dup rebase bug

9ee437bf

koparasy approved these changes on 2026-03-24

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koparasy

arsenm

lanza

bcardosolopes

xlauko

andykaylor

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clang backend:AMDGPU ClangIR

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llvm-project [CIR][AMDGPU] Lower Language specific address spaces and implement AMDGPU target #179084 Open

[CIR][AMDGPU] Lower Language specific address spaces and implement AMDGPU target #179084

llvm-project
[CIR][AMDGPU] Lower Language specific address spaces and implement AMDGPU target
#179084

Open