Commits llvm/llvm-project

[clang][HeaderSearch] Introduce APIs to find a module's module map without loading

cyndyishida committed 2 days ago

8724eff4

[clang][Modules] Refactor modulemap lookup & parse functions, NFCI

cyndyishida committed 2 days ago

349de028

[Hexagon] Lower 4 IEEE HVX conversions to a call (#232862)

fhossein-quic committed 2 days ago

Verified 6dc8c42b

[mlir][acc] Decide reduction atomics by destination instead of by partitioning (#235099)

VijayKandiah committed 2 days ago

Verified b9d15ca7

[lldb] Fix a race in PlatformAppleSimulator::GetSDKFilepath (#235098)

JDevlieghere committed 2 days ago

Verified af9c7cea

[NVPTX] Avoid nonlocal MachineCSE of special register reads. (#228303)

njriasan committed 2 days ago

Verified 65884c87

[TableGen] Assert that RecordVal values are never null (#235077)

jayfoad committed 2 days ago

Verified 0d5253f6

[CGData][GMF] Don't parameterize callees in ptrauth-calls functions (#234008)

oskarwirga committed 2 days ago

Verified 1bfac01b

[LSR] Return null from `getExactSDiv` for a zero divisor (#226703)

akash-manna-sky committed 2 days ago

Verified 211e1e70

[AArch64][RuntimeDyld] Handle far external symbols in COFF JIT code (#229719)

yafet-a committed 2 days ago

Verified f330666a

[Mem2Reg] Don't handle indirect lifetime markers (#235740)

nikic committed 2 days ago

Verified e754f0ef

TableGen: Skip disjoint register classes before intersecting them (#234803)

arsenm committed 2 days ago

Verified ff57d874

TableGen: Compute register sizes once for the sub-register size check (#234802)

arsenm committed 2 days ago

Verified a6207617

TableGen: Test register sub-classes with the member bit vectors (#234801)

arsenm committed 2 days ago

Verified 1b886399

TableGen: Skip redundant addComposite calls for secondary sub-registers (#234800)

arsenm committed 2 days ago

Verified c535a9b4

TableGen: Index registers by sub-register index enum value when inferring sub-classes (#234799)

arsenm committed 2 days ago

Verified 7e400820

TableGen: Store super-register class sets as bit vectors (#234798)

arsenm committed 2 days ago

Verified 7b9a9aa7

[AMDGPU] Rename 1024AddressableVGPRs to VGPRMSBs. NFC (#235331)

chinmaydd committed 2 days ago

Verified dd154a6e

[SLP] Add test for compressed load instruction that appears as uncompressed during costing (#235581)

bababuck committed 2 days ago

Verified cc3c6061

[ELF] Parallelize .eh_frame_hdr table by moving it to writeTo (#235799)

MaskRay committed 2 days ago

Verified ba6c0ce2

[SLP][NFC]Add a test for extracted fields as bswaps, NFC

alexey-bataev committed 2 days ago

Verified 2c96331f

[libunwind] Don't include <sys/syscall.h> from assembly on Linux (#235756)

googlewalt committed 2 days ago

Verified 65527a00

[MLIR][XeGPU] Use all ones as the neutral value of an AND reduction (#232828)

mshahneo committed 2 days ago

Verified 93aede0c

[CIR] Keep the address space in thunk this and return adjustments (#234183)

aobolensk committed 2 days ago

Verified 93b1349d

[clang][webkit][NFC] Avoid stringifying non-WTF base types when we can (#235713)

adamtheturtle committed 2 days ago

Verified 7b13fff7

Reland "[ELF] Omit zero-range FDEs from .eh_frame_hdr" (#235793)

MaskRay committed 2 days ago

Verified dd82beb9

[llubi] Add support for llvm.masked.load (#234772)

fhahn committed 2 days ago

Verified a4b32a43

[CodeGen][LSR] Use std::sort instead of qsort for hot sorts (NFC) (#235559)

fhahn committed 2 days ago

Verified 60d2acda

[gn build] Port ebf119a3a5e2 (#235792)

nico committed 2 days ago

Verified 9a38289c

[FunctionAttrs] Stop scanning memory effects once they are final (NFC) (#235568)

fhahn committed 2 days ago

Verified e82272c9